Integral part of the C-extension is the ability to fetch instructions that can be both 32-bit and 16-bit in length. We need to design a new instruction reader that will be able to handle those, and properly route them downstream to the decoder. Important aspect of half-word instructions is that the arrangement of the instructions may cause a full-word (32-bit) instruction to be split across the word-address boundary in memory (i.e. the high 16-bits of an instruction are at the lower 16-bit of the word at address X and the low 16-bit of that instruction are the the higher 16-bits of the word at address X+1)
Integral part of the C-extension is the ability to fetch instructions that can be both 32-bit and 16-bit in length. We need to design a new instruction reader that will be able to handle those, and properly route them downstream to the decoder. Important aspect of half-word instructions is that the arrangement of the instructions may cause a full-word (32-bit) instruction to be split across the word-address boundary in memory (i.e. the high 16-bits of an instruction are at the lower 16-bit of the word at address
Xand the low 16-bit of that instruction are the the higher 16-bits of the word at addressX+1)