arm64: dts: mt7988a-bpi-r4pro: fix mxl switch on 4E variant

The BPI-R4 Pro 4E attaches sfp1 to MxL86252C port 12.  The 8X variant
attaches the same sfp1 cage to port 13:

  mt7988a-bananapi-bpi-r4-pro-8x-lan-sfp.dtso:
	port@13 {
		reg = <13>;
		label = "lan6";
		sfp = <&sfp1>;
		phy-mode = "usxgmii";
	};

Both boards include mt7988a-bananapi-bpi-r4-pro.dtsi and therefore the
same switch node (compatible "maxlinear,mxl86252"), so the switch and
the SFP cage are identical; only the port number differs.

With reg = <12> the switch fails to probe:

  mxl862xx mdio-bus:10: CMD 0202 returned error -1022
  mxl862xx mdio-bus:10: Unable to use tag protocol "mxl862xx-8021q": -EIO
  mxl862xx mdio-bus:10: probe with driver mxl862xx failed with error -5

CMD 0202 is TFLOW_PCERULEWRITE.  It is issued from
mxl862xx_refresh_cpu_targets(), which walks every user port and
installs the per-CTP link-local and IGMP/MLD trap rules.  Exactly one
command fails, and ports 1-4 are common to both boards and work there,
which leaves the lan6 port as the failing one.  The error propagates
out of change_tag_protocol() and aborts the probe, so no port comes up
at all.

Also rename the node so its unit address matches its reg property.

Author: meehien

arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-pro-4e.dts

@@ -42,8 +42,8 @@
 
 &switch16 {
 	ports {
-		port6: port@6 {
-			reg = <12>;
+		port13: port@13 {
+			reg = <13>;
 			label = "sfp-lan";
 			phy-mode = "usxgmii";
 			phy-connection-type = "usxgmii";