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tools/mpy_ld.py: Optimise MPY trampoline sizes if possible. Build ports metadata #87: Commit 0fd0843 pushed by sfe-SparkFro
9s master
master
9s
rp2/machine_spi: Improve RX overrun handling. Build ports metadata #86: Commit 95a4749 pushed by sfe-SparkFro
9s rp2_spi_no_dma
rp2_spi_no_dma
9s
rp2/machine_spi: Detect RX overrun when using DMA transfers. Build ports metadata #85: Commit 30fb190 pushed by sfe-SparkFro
9s rp2_spi_no_dma
rp2_spi_no_dma
9s
mpy-cross/mpconfigport: Explicitly disable native code loading. Build ports metadata #84: Commit 8fb848f pushed by sfe-SparkFro
9s master
master
9s
Build ports metadata Build ports metadata #83: Commit 403b109 pushed by sfe-SparkFro
8s rp2_spi_no_dma
rp2_spi_no_dma
8s
esp32/machine_sdcard: Fix SDMMC slot assignment for non-default slots. Build ports metadata #82: Commit e67d4a2 pushed by sfe-SparkFro
8s master
master
8s
rp2/machine_spi: Don't use DMA channels for SPI transfers. Build ports metadata #81: Commit 54171d2 pushed by sfe-SparkFro
10s rp2_spi_no_dma
rp2_spi_no_dma
10s
tests/basics/string_fstring.py: Test fstring nested replacement fields. Build ports metadata #80: Commit ef567dc pushed by sfe-SparkFro
17s master
master
17s
rp2/mpconfigport: Enable MD5, SHA1 and cryptolib on all boards. Build ports metadata #79: Commit e6a7dc1 pushed by sfe-SparkFro
8s master
master
8s
rp2/hstx: Drain FIFO after soft reset. Build ports metadata #78: Commit 74ee1eb pushed by sfe-SparkFro
10s rp2_hstx
rp2_hstx
10s
rp2: Properly close DMA channels. Build ports metadata #77: Commit d5910c1 pushed by sfe-SparkFro
13s rp2_dma_deinit
rp2_dma_deinit
13s
docs/rp2: Add HSTX class documentation. Build ports metadata #76: Commit 4f2c806 pushed by sfe-SparkFro
15s rp2_hstx
rp2_hstx
15s
Build ports metadata Build ports metadata #75: Commit b005b40 pushed by sfe-SparkFro
9s rp2_hstx
rp2_hstx
9s
Build ports metadata Build ports metadata #74: Commit 5f34a97 pushed by sfe-SparkFro
8s rp2_hstx
rp2_hstx
8s
rp2: Add HSTX ALT function. Build ports metadata #73: Commit 7a554db pushed by sfe-SparkFro
11s rp2_pins_af0
rp2_pins_af0
11s
Build ports metadata Build ports metadata #72: Commit 60b20e9 pushed by sfe-SparkFro
12s rp2_pins_af0
rp2_pins_af0
12s
shared/runtime/pyexec: Set PYEXEC_FORCED_EXIT flag for SystemExit. Build ports metadata #71: Commit a686410 pushed by sfe-SparkFro
10s master
master
10s
Build ports metadata Build ports metadata #70: Commit 746d79d pushed by sfe-SparkFro
8s rp2_dma_deinit
rp2_dma_deinit
8s
docs/mimxrt/pinout: Use Dxx pin identifiers for Teensy boards. Build ports metadata #69: Commit c07fda7 pushed by sfe-SparkFro
12s master
master
12s
py/mkrules: Change LIB to LIBS. Build ports metadata #68: Commit dbaa315 pushed by sfe-SparkFro
8s fix_cpp_module_make
fix_cpp_module_make
8s
py: Add LIBS_USERMOD to LIBS. Build ports metadata #67: Commit 7176acb pushed by sfe-SparkFro
10s fix_cpp_module_make
fix_cpp_module_make
10s
Build ports metadata Build ports metadata #66: Commit ea0c04f pushed by sfe-SparkFro
9s fix_cpp_module_make
fix_cpp_module_make
9s
Build ports metadata Build ports metadata #65: Commit c1a8c50 pushed by sfe-SparkFro
10s mimxrt_ld
mimxrt_ld
10s
stm32/machine_uart: Implement TX/RX inversion parameter for UART on H7. Build ports metadata #64: Commit 4efc5e1 pushed by sfe-SparkFro
9s master
master
9s
rp2: Add initial HSTX implementation. Build ports metadata #63: Commit c24e8ef pushed by sfe-SparkFro
8s rp2_hstx
rp2_hstx
8s