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<!DOCTYPE html>
<html lang="en">
<head>
<meta charset="UTF-8" />
<meta name="viewport" content="width=device-width, initial-scale=1" />
<title>UofT ASIC Education</title>
<meta name="description" content="UofT ASIC Team internal education hub — courses, workspace, and roadmap" />
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</head>
<body>
<main>
<p class="brand">UofT ASIC Team</p>
<h1>Education</h1>
<p class="lede">
Async, hands-on modules for undergraduates — from first tools to GDSII —
using an open-source toolchain. Start with the shared workspace, then IC101.
</p>
<h2>Start here</h2>
<ol class="steps">
<li>
<span class="n">1</span>
<span>Clone the shared <a href="https://github.com/uoftasic/workspace">workspace</a> once (Docker + IIC-OSIC-TOOLS). Later courses drop into <code>modules/</code> via <code>mod add</code>.</span>
</li>
<li>
<span class="n">2</span>
<span>Complete <a href="https://uoftasic.com/ic101/">IC101 — Onboarding onto Tools</a>.</span>
</li>
<li>
<span class="n">3</span>
<span>Pick Analog or Digital below and work through courses in order.</span>
</li>
</ol>
<h2>Available now</h2>
<ul class="catalog">
<li>
<a href="https://uoftasic.com/ic101/">
<strong>IC101 — Onboarding onto Tools</strong>
<span>Set up the shared Docker workspace and SKY130 toolchain every later course builds on.</span>
</a>
</li>
<li>
<a href="https://uoftasic.com/ad101/">
<strong>AD101 — Signals</strong>
<span>Waveforms, spectra, and Bode plots — a gentle primer before circuits.</span>
</a>
</li>
</ul>
<h2>Roadmap</h2>
<p class="lede" style="margin-bottom:1rem;font-size:1rem;animation:none;">
Planned modules — titles only until each course site publishes.
</p>
<div class="tracks">
<div class="track">
<h3>Analog</h3>
<ul class="roadmap">
<li><span class="id">AD102</span> Linear Circuits & Fabrication<em>Linear analysis folded together with how passives are fabricated on-chip.</em></li>
<li><span class="id">AD103</span> Nonlinear Circuits<em>The diode and MOSFET in XSchem: regions of operation and key device parameters.</em></li>
<li><span class="id">AD104</span> Layout<em>Full-custom layout: stick diagrams, DRC/LVS-clean cells, PEX, and manual P&R.</em></li>
<li><span class="id">AD201</span> Analog Signal Processing<em>Stretch track: filters, amplifiers, and the OpAmp.</em></li>
<li><span class="id">AD202</span> Mixed Signal<em>Stretch track: ADCs, DACs, and the analog/digital interface.</em></li>
</ul>
</div>
<div class="track">
<h3>Digital</h3>
<ul class="roadmap">
<li><span class="id">DD101</span> Intro to Digital Logic<em>Logic from first principles and lowering to gates.</em></li>
<li><span class="id">DD102</span> Digital Logic & FPGAs<em>RTL on FPGAs and SystemVerilog, culminating in a ripple adder.</em></li>
<li><span class="id">DD103</span> RTL on FPGAs & ASICs<em>SystemVerilog in depth and the open-source RTL-to-GDSII flow.</em></li>
<li><span class="id">DD104</span> Pre-Silicon Verification<em>Verification with open-source tools: testbench a buggy core and fix it.</em></li>
<li><span class="id">DD201</span> HLS<em>Stretch track: high-level synthesis languages.</em></li>
<li><span class="id">DD202</span> Computer Architecture<em>Stretch track: memory architecture and a simple computer.</em></li>
</ul>
</div>
</div>
<footer>
Maintainers: stamp new courses from the
<a href="https://uoftasic.com/course-template/">course template</a>.
Edit <code>data/courses.json</code> and run <code>python scripts/build.py</code> to refresh this hub.
</footer>
</main>
</body>
</html>