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fix(nixl): select UCX copy transport by accelerator - #3215

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fix(nixl): select UCX copy transport by accelerator#3215
yafshar wants to merge 1 commit into
PrimeIntellect-ai:mainfrom
yafshar:fix/nixl-accelerator-aware-ucx

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@yafshar yafshar commented Aug 7, 2026

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Problem

set_ucx_env_defaults() hardcoded cuda_copy as the UCX device-memory
copy transport. UCX exposes one such transport per accelerator family —
cuda_copy for CUDA, ze_copy for Level Zero — so on XPU the NIC cannot
pin device memory and every NIXL registration fails:

ibv_reg_dmabuf_mr(...) failed: Invalid argument
failed to register address ... (ze-device) ... on md[0]=mlx5_0
registerMem: registration failed for the specified or all potential backends

Change

Derive the copy transport from torch.accelerator.current_accelerator().
UCX_TLS is a whitelist, so an accelerator missing from the map omits the
token rather than naming a transport the local UCX build lacks — which
would narrow transport selection instead of widening it.

Also swaps the deprecated mem_type="cuda" alias for "VRAM". Both
resolve to VRAM_SEG (nixl/_api.py:255-261), so this is a no-op rename.

Verified

Emitted UCX_TLS, measured on two machines:

node accelerator UCX_TLS
torch 2.13.0+cu130 cuda rc_x,rc,dc_x,dc,cuda_copy
torch 2.13.0+xpu xpu rc_x,rc,dc_x,dc,ze_copy

The CUDA string is byte-identical to the previous hardcoded value. Both
match the transports the respective UCX builds advertise under
ucx_info -d (Transport: cuda_copy / Transport: ze_copy).

Note for reviewers

DEFAULT_INFERENCE_ENV_VARS sets UCX_TLS=all (utils/process.py:32),
applied on every inference launch path. Since these are setdefault
calls, the derived value only takes effect on the trainer path today;
inference keeps all, which already includes ze_copy. Left alone here
— happy to follow up if you'd rather inference use the derived string.

Separately, scripts/install_nixl_from_source.sh configures UCX with
--with-ze=no, so a UCX built by that script cannot provide ze_copy.
Out of scope for this PR; needs a verified build.

Choose cuda_copy for CUDA and ze_copy for XPU when setting UCX_TLS for
NIXL. This avoids forcing the CUDA copy transport on Level Zero devices,
where UCX cannot pin device memory through that path and registration
fails with ibv_reg_dmabuf_mr: Invalid argument (md supports:
host|ze-device).

UCX_TLS is a whitelist, so an accelerator missing from the map omits the
copy transport rather than naming one the local UCX build lacks, which
would narrow transport selection instead of widening it. The CUDA path
is unchanged.

Use NIXL's generic VRAM mem_type instead of the CUDA-specific alias; both
resolve to VRAM_SEG, so the transfer path is unaffected.

Signed-off-by: Yaser Afshar <yaser.afshar@intel.com>
@yafshar
yafshar marked this pull request as ready for review August 8, 2026 11:43
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