retroDE ao486

x86 PC (486-class) core for the retroDE FPGA platform — runs DOS, early Windows, and a wide swath of 486-era software on real silicon.

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About

This is the ao486 core for retroDE, an open-source FPGA retro gaming platform targeting the Terasic DE25-Nano (Intel Agilex 5). The RTL is a DE25-Nano port of the MiSTer ao486 core, which derives from Aleksander Osman's original ao486 project. See CREDITS.md for full attribution.

For the overall platform, main entry point, and the list of available cores, see the top-level project: https://github.com/Thejayman77/retroDE

Status

Working on real hardware. Boots DOS, runs the standard SeaBIOS + LGPL VGABIOS firmware path, drives HDMI video and audio through the retroDE platform shell. Active development — working does not mean finished.

Features

• 80486-class CPU core (Aleksander Osman's ao486, BSD-2-clause)
• IDE primary + secondary (HDD + ATAPI CD-ROM), floppy
• VGA + SVGA via VBE (LGPL VGABIOS)
• Sound Blaster compatible audio via OPL3 + DMA
• LPDDR4-backed memory map: 640 KiB conventional + extended RAM in the reserved arena
• HPS-side retrodesd integration: OSD-driven IDE/CD-ROM/floppy mount, CMOS persistence, boot-order config
• Manifest-driven core entry — selectable from the retroDE supervisor menu

Repository layout

retroDE_ao486/
├── retroDE_ao486.sv          # Top-level
├── retroDE_ao486.qsf / .qpf  # Quartus project
├── retroDE_ao486.sdc         # Timing constraints
├── compile_ao486.sh          # Build + bitstream packaging
├── post_flow.tcl             # Post-assembler HPS-first bootloader merge
├── rtl/ao486/                # ao486 CPU core, cache, soc, common (BSD-2)
├── rtl/platform/             # Local platform RTL (mostly shared with splash)
├── ip/                       # Agilex 5 PLLs
├── hps_subsys/               # HPS + EMIF + AXI bridge subsystem
├── peripheral_subsys/        # On-chip peripherals
├── qsys_top/                 # Top-level Platform Designer interconnect
├── custom_ip/                # User custom IP (f2sdram_adapter, reset_sync)
├── bios/                     # LGPL VGABIOS images (boot1_*.rom)
├── roms/                     # LGPL Bochs BIOS (boot0.rom)
├── software/
│   ├── ao486_loader.c        # HPS-side legacy standalone loader
│   └── FD14-FloppyEdition/   # FreeDOS 1.4 floppy images (GPLv2)
├── docs/ao486_lpddr4_abi.md  # FPGA↔HPS LPDDR4 layout ABI
├── CREDITS.md                # Upstream attribution + BIOS provenance
├── COPYING / LICENSE         # GPLv3
└── COPYING.LGPL-2.1          # LGPL text for VGABIOS / Bochs BIOS

Build prerequisites

• Intel Quartus Prime Pro 26.1 (or set QUARTUS_ROOTDIR to match)
• Terasic DE25-Nano board
• retroDE_splash checked out as a sibling directory (see below)

Expected directory layout

This core shares RTL and the u-boot SPL with the retroDE platform shell. Clone retroDE_splash next to retroDE_ao486:

your-workspace/
├── retroDE_splash/   # Platform chassis — must be present
└── retroDE_ao486/    # This repo

Files referenced from ../retroDE_splash/ during build include the shared platform RTL and the u-boot SPL hex for the combined bitstream. Override the location with RETRODE_ROOT=/path/to/workspace if your layout differs.

Building

# Defaults: assumes ../retroDE_splash is a sibling, quartus_sh on PATH
./compile_ao486.sh

# Clean build artifacts
./compile_ao486.sh clean

# Override locations
QUARTUS_ROOTDIR=/opt/intel/quartus_pro/26.1/quartus \
UBOOT_HEX=/custom/path/u-boot-spl-dtb.hex \
./compile_ao486.sh

ao486 is a large core — expect ~25–30 minutes per full compile on a modern machine.

Output bitstreams land in output_files/:

• retroDE_ao486.core.rbf — runtime FPGA fabric bitstream (deploy this)
• retroDE_ao486.hps.rbf — HPS-merged RBF (rarely used; splash JIC handles QSPI)

Manifest entry

Add this section to ~/cores/manifest.cfg on your DE25 to register the ao486 core with retrodesd:

[ao486]
name=ao486 (x86 PC)
rbf=/home/terasic/cores/retroDE_ao486.core.rbf
backend=ao486
core_id=0x41343836          # "A486"
min_abi=0x00000100          # ABI v1.0
config=/home/terasic/ao486.cfg
bios.0=bios:/home/terasic/bios/boot0.rom
bios.1=vgabios:/home/terasic/bios/boot1_vbe.rom
media=ide,floppy,cdrom

Place boot0.rom (Bochs BIOS) and boot1_vbe.rom (VGABIOS) into ~/bios/ on the DE25. Both are shipped in this repo under bios/ and roms/. Mount your own DOS hard drive image, floppy, or CD via the OSD menu.

See the umbrella SETUP.md for the full list of manifest options.

License

GPLv3 on the combined work — see LICENSE and COPYING.

The ao486 CPU core inherits its BSD-2-clause license from Aleksander Osman's upstream — compatible with GPL, headers preserved. The shipped BIOS blobs (bios/boot1_*, roms/boot0.rom) are LGPLv2.1 — see COPYING.LGPL-2.1 and the per-file licensing table in CREDITS.md.

Do not strip original copyright headers from any file.